AVR JTAG is to match the Atmel company's AVR Studio of a complete set of on-chip debug tool based on JTAG interfacesupport all AVR 8-bit RISC microprocessor instruction with the JTAG mouth. The JTAG interface is a 4 line of IEEE 1149.1 standard test access port (TAP) controller. The IEEE standards provide an effective circuit connectivity test of standard method (boundary scan). Atmel AVR devices has expanded the piece complete programming and debugging support functions. AVR JTAG simulation is used to make chips hardware simulation such as program step set breakpoints etc. through hardware emulation can be informed of the chip inside the detailed operation program. AVR JTAG emulator are mainly used for simulation on chip for operation. JTAG ICE support: ATMega16?ATmega16L?ATMega162?ATmega162V?ATmega165?ATmega165V?ATMega169?ATmega169V?ATMega32?ATMega323?ATmega323L?ATmega32L?ATMega64?ATmega64L?ATMega128?ATmega128L?AT90CAN128ATMega16?ATmega16L?ATMega162?ATmega162V?ATmega165?ATmega165V?ATMega169?ATmega169V?ATMega32?ATMega323?ATmega323L?ATmega32L?ATMega64?ATmega64L?ATMega128?ATmega128L?AT90CAN128